The present invention relates to an output stage, such as a driving stage or a line driver for transmitting data on line, having a protection circuit against accidental negative overvoltage at the stage output and a reference voltage circuit.
A driving stage of the indicated type is schematically shown in FIG. 1, wherein Q indicates an output transistor, the collector whereof defines the output on which the voltage V.sub.OUT is present and the emitter whereof is connected to the ground. In detail, the stage comprises an input comparator C which has an inverting input connected to a reference voltage V.sub.REF and a non-inverting input to which a control voltage V.sub.IN is supplied. The output of the comparator C controls the open or closed state of a switch T which is connected on one side to a source of current I and on the other to the base of Q; a resistor R is furthermore provided between the base of Q and the ground, whereas a load resistor R.sub.L is provided between the collector of Q and the positive supply voltage V.sub.CC.
Consequently, when the voltage V.sub.IN at the non-inverting terminal of the comparator C exceeds the value of the reference voltage V.sub.REF, the switch T is closed, injecting the current I in the base of the transistor Q, which starts to conduct and saturates, so as to bring the output to a voltage which corresponds to a low logical state. Alternatively, when the voltage V.sub.IN is lower than the reference voltage, the switch T opens, Q is switched off and the output reaches the value of V.sub.CC due to the presence of R.sub.L. Therefore the low output level is equal to the saturation voltage of the transistor with respect to the ground, whereas the high output level is equal to V.sub.CC, as required by the specifications.
Though it operates satisfactorily in most cases, this known stage is subject to damage if a negative voltage which is higher, in absolute value, than the negative supply voltage -V.sub.EE (i.e. when V.sub.OUT &lt;-V.sub.EE) is inadvertently applied to its output.
The output transistor Q is in fact an integrated bipolar transistor executed with junction insulation, as illustrated in the transverse sectional view of FIG. 2. In this figure, the reference numeral 1 indicates the P-type substrate, 2 indicates the epitaxial layer and 3 indicates the P.sup.+ -type insulation ring which insulates the well 3', in which the transistor is integrated, from the other structures which are integrated in the same device. The reference numeral 4 indicates the N+-type buried layer and 5 indicates the N+-type sinker layer which forms, together with the well 3', the collector of the transistor. The P-type diffusion 6 defines the base, whereas the N+-type diffusion 7 forms the emitter of Q. The diffusions 5, 6 and 7 are connected to the collector contact C, to the base contact B and to the emitter contact E respectively. As pointed out in the figure in broken lines, the P-type substrate 1 forms, together with the collector structure 4, 5, a parasitic diode DP.sub.1. Said diode is thus connected with its cathode to the collector of Q and with its anode to the negative supply voltage -V.sub. EE of the stage, since the substrate is connected to said voltage.
The parasitic diode DP.sub.1 consequently starts to conduct when the voltage applied to the collector terminal is more negative than the voltage applied to the substrate (i.e., indeed, V.sub.OUT &lt;-V.sub.EE), conducting a high current which compromises the integrity of the stage.
In order to solve this problem, the arrangement of a diode in series to the collector of Q, between said collector and the output, has already been proposed. This solution is shown by way of example in FIG. 3, wherein the protection diode has been indicated by D.sub.1 and the rest of the structure is identical to FIG. 1. With this known solution, when a negative overvoltage is applied to the output terminal, the diode D.sub.1 remains blocked and the current flows exclusively across R.sub.L and is limited thereby.
However, even this solution is not optimum, since the output voltage of the circuit in the low state becomes equal to the sum of the saturation voltage between the collector and the emitter of Q and the drop on D.sub.1, i.e.: EQU V.sub.OUT,low =V.sub.CEsat,Q +V.sub.D1 .noteq.0.1 V+0.7 V=0.8 V.
This value is unacceptable, since the output voltage at the low level must never exceed 0.4 V, as required for the outputs of certain types of digital circuits such as for example TTL circuits.
The use of a Schottky diode with a typical V.sub.D of 250 mV would lead to a low output voltage of approximately 350 mV which would therefore be acceptable. The problem with this solution is that in the bipolar technology used for this stage Schottky diodes are not available.
Consequently, in a stage of the indicated type there is the problem of providing a protection which on one hand is capable of ensuring the integrity of the protected stage even when the output reaches a voltage which is lower than the negative power supply and on the other hand provides output voltage levels which are compatible with current specifications of digital circuits.